The following discussion of the art of the plastic packaging of electrical components, especially of integrated circuits is, in part, summarized from Chapter 18, "Packaging" in Microchip Fabrication, pp 539-586, Peter van Zant, McGraw-Hill, 1997. This background information is herewith incorporated by reference.
After wafer fabrication, semiconductor chips undergo several processes to prepare the chips for eventual use. By way of illustration, but not limitation, some of these processes include: backside preparation; die separation; die pick; inspection; die attach; wire bonding; pre-seal inspection; package sealing; plating; trimming; marking; and final testing. Many of these processes can be categorized as part of the packaging, or enclosure process.
One form of enclosure common to semiconductor or integrated circuit (IC) manufacture is the molded epoxy package. Epoxy packages perform the four basic requirements of an electronic package for the circuit chip, or die ("chip"), they house: they support a substantial lead system for connecting the device to the system component which will utilize it; they provide physical protection of the device from breakage, contamination and abuse; they protect the device from environmental hazards such as chemicals, moisture and gasses which could interfere with device performance; and they provide a path for dissipating the heat generated by the functioning of the device. Epoxy packaging presents several major advantages over some other device packaging technologies: it is light in weight, low in cost, and high in manufacturing efficiency.
One method of epoxy packaging of semiconductor devices is summarized as follows, and is illustrated in prior art FIGS. 1 and 2. Having reference to those figures, this methodology is explained as follows: after die separation (and in some cases, after some of the previously mentioned steps, the die, 1', concentric with device 1, is attached and bonded to a composite lead frame, 2. In the exemplar here presented, lead frame 2 includes horizontal rails, 5, and vertical tie bars, 7, and provides a plurality of lead systems for connecting to the semiconductor dice (not shown), thereby producing the useful individual device. In this example there are provided a plurality of individual device lead frames 2, each having mounted thereon a further plurality of dice, 1'. After die mounting, the lead frames having the dice mounted thereon are often given some form of pre-seal inspection.
After the pre-seal inspection, the lead frames are transferred to a molding apparatus. Commonly used in this procedure is a transfer molding process which encapsulates and surrounds each of the dice and at least a portion of the lead frame assembly with a plastic encapsulant. Commonly utilized plastic encapsulants include, but are not limited to: epoxies, monomers, polymers, and other thermoplastic, thermosetting, and thermoforming resins. In the exemplar here presented, a silica-filled epoxy is utilized as the encapsulant.
The lead frames are placed in a mold, here a two-part mold consisting of mold halves 20 and 21. At least one mold half, often the bottom, has formed therein a gate, 10. The mold halves are clamped together, typically with some force, and often a portion of the lead frames, 2, completes the mold cavity, 16. The vent, 24, which provides a path for escaping air during the transfer molding process, is typically filled with the encapsulant during that operation.
After the mold has been clamped about lead frames 2 and dice 1', the molding apparatus is charged with a quantity of epoxy material, for instance as beads, through sprues 14. The epoxy material may have been previously softened by means of heating or chemical reaction. The transfer molding apparatus then induces pressure, usually by means of a ram in operative combination with sprue 14, on the molten, viscous epoxy and it flows from sprues 14 through a series of runners, 12, thence through tapered sections 11 of gates 10, and thence into mold cavities 16. As the ram (not shown) continues to apply pressure to the mass of liquid epoxy, it is then forced around the dice, 1', encapsulating the dice and forming the individual packages, or devices, 1.
After the epoxy is at least partially set, the molds are separated, and the lead frame assembly is removed therefrom. This assembly may then be further cured by an oven or other heat means. Following final curing, the packages undergo further processing including, but not limited to: plating; runner removal; de-flashing; marking; and final testing. The finished packaged component is then ready for use.
The preceding discussion presents a broad overview of the plastic packaging of electrical components, as practiced by others having ordinary skill in the art. Details of one example of such a molding process can be found in U.S. Pat. No. 4,697,784 to Schmid.
A recent trend in the semiconductor industry, particularly relating to integrated circuit (IC) manufacture, is the emergence of smaller package forms for packaging ICs. These smaller forms may be referred to as flat packs (FPs), thin small outline packages (TSOPs), small outline ICs (SOICs), ultrathin packages (UTPs), or quad flat packs (QFPs). Each of these packages is constructed in similar fashion as dual in-line packages (DIPs) but are designed with smaller height profiles and typically have their leads bent out to the side of the package. It will accordingly be appreciated that for a given size die, encapsulating the die in one of these thin packages decreases the proportion of plastic encapsulant with respect to the integrated circuit contained therein.
The adoption of thin packages has enabled the implementation of integrated circuit technology in applications previously unavailable. The fabrication of these thin packages however presents new challenges to the manufacturer thereof. A major new challenge is the increased failure rate of thin packages, particularly TSOPs, due to warpage.
The exact mechanism causing this increased warpage rate in TSOPs is still under investigation. It is surmised that perhaps a differential curing rate between the relatively massive sprue/runner/gate structure and the thinly clad dice may have an effect on warpage. It is known that some thermosetting materials, including some epoxies, tend to cure more readily in larger masses, while thinner films of the same material cure more slowly under identical conditions.
What is needed then is a methodology to reduce the warpage in thinly packaged electrical components, preferably without substantially altering the physical size of either the packaged die, or the package itself. The methodology should preferably be implementable on existing transfer molding equipment. The methodology should further be implementable using existing encapsulants, and generally be capable of economic implementation.